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copyright ? rda microelectronics inc. 2006. all rights are reserved. the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . rda5807 h s s ingle -c hip b roadcast fm r adio t uner rev. 1.2? july .201 1 1 g eneral description the rda 580 7 h s is a new generation single - chip broadcast fm stereo radio tuner with fully integrated synthesizer, if selectivity and mpx decoder. the tuner us es the cmos process, support multi - interface and require the least external co mponent. the package size is 3x3 mm and is completely adjustment - free. all these make it very suitable for portable devices. the RDA5807HS has a powerful low - if digital audio pro cessor, this make it have optimum sound quality with varying reception conditions. the RDA5807HS can be tuned to the worldwide frequency band , even support frequency range 50~65mhz. 1.1 f eatures ? cmos single - chip fully - integrated fm tuner ? low power consumption ? total current co nsumption lower than 2 1 ma at 3. 0 v power supply when under normal situation ? support worldwide frequency band ? 50 - 108 mhz ? support flexible channel spacing mode ? 100khz, 200khz, 50khz and 25khz ? digital low - if tuner ? image - reject down - converter ? high performance a/d converter ? if selectivity performed internally ? fully integrated digital frequency synthesizer ? f ully integrated on - chip rf and if vco ? f ully integrated on - chip loop filter ? autonomous search tuning ? support 32.768khz crystal oscillator ? digi tal auto gain control (agc) ? digital adaptive noise cancellation ? mono/stereo switch ? soft mute ? high cut ? programmable de - emphasis (50/75 s) ? receive signal strength indicator (rssi) and snr ? bass boost ? v olume control and mute ? i 2 ? line - level analog output voltage s digital output interface ? 32.768 khz 12m,24m,13m,26m,19.2m,38.4mhz r eference clock ? 2 - wire serial control bus interface ? directly support 32 resistance loading ? integrated ldo regulator ? 1.8 to 5.5 v operation voltage ? 3 x 3 mm 2 0 pin qfn package 2 3 4 5 1 6 15 14 13 12 11 7 8 9 10 20 19 18 17 16 gnd pad gnd rfgnd lnap gnd rda 5807hs vdd gnd lout lnan rout gnd sclk sdio rclk vio gnd nc nc gpio1 gpio2 gpio3 figure 1 - 1 . rda 580 7 h s top view free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 2 of 22 1.2 applications ? cellular handsets ? mp3, mp4 players ? portable radios ? pdas, notebook free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 2 of 22 2 table of contents 1 general description .................................................................................................................................... 1 1.1 features ......................................................................................................................................... 1 1.2 applications .................................................................................................................................... 2 2 table of contents ......................................................................................................................................... 2 3 functional descript ion ................................................................................................................................ 3 3.1 fm receiver .................................................................................................................................. 3 3.2 synthesizer1 .................................................................................................................................. 3 3.3 delta - sigma synth esizer ................................................................................................................... 4 3.4 power supply ................................................................................................................................ 4 3.5 reset and control interface select ............................................................................................. 4 3.6 control interface ........................................................................................................................... 4 3.7 i 2 s audio data interface ............................................................................................................... 4 3.8 gpio outputs ................................................................................................................................ 4 4 electrical characteristics ........................................................................................................................... 5 5 receiver characteristics ............................................................................................................................. 6 6 serial interface ............................................................................................................................................ 7 6.1 i 2 c interface timing ...................................................................................................................... 7 7 register definition ...................................................................................................................................... 8 8 pins description ......................................................................................................................................... 12 9 application diagram ................................................................................................................................. 14 9.1 audio loading resistance larger than 32 & tcxo application: ......................................... 14 9.1.1 bill of materials: ......................................................................................................................... 14 9.2 audio loading resistance lower than 32 & dcxo application: ........................................ 15 9.2.1 bill of materials: ......................................................................................................................... 15 10 package physical dimension .................................................................................................................... 16 11 pcb land pattern ..................................................................................................................................... 17 12 ch ange list ................................................................................................................................................ 20 13 contact information ................................................................................................................................. 21 free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 3 of 22 3 functional description i adc l dac r dac q adc + - audio dsp core digital filter mpx decoder stereo/mono audio vco synthesizer1 gpio interface bus rssi vio sdio sclk sen rst mcu gpio RDA5807HS lout rout lnan lnap rclk 2.7-5.5 v 32.768 khz vdd ldo limiter ?-synthesizer lna i pga q pga figure 3 - 1 . rda 5807hs fm tuner block diagram 3.1 fm receiver the receiver uses a digital low - if architecture that avoids the difficulties associated with direct conversion while delivering lower solution cost and reduces complexity, and integrates a low noise amplifier (ln a) sup porting the fm broadcast band ( 50 to 108mhz), a multi - phase image - reject mixer array , a programmable gain control (pga), a high resolution analog - to - digital converters (adcs), an audio dsp and a high - fidelity digital - to - analog converters (dacs). th e lna has differential input ports (lnap and lnan) and support s any input port by set according registers bits ( l na _port_sel [1:0]). it default in put common mode voltage is gnd. the limiter prevents overloading and limits the amount of intermodulation produ cts created by strong adjacent channels. t he multi - phase mixer array down converts the lna output differential rf signal to low - if, it also has image - reject function and harmonic tones rejection . t he pga amplifies the mixer output if signal and then digiti zed with adcs. the dsp core finishes the channel selection, fm demodulation, stereo mpx decoder and output audio signal. the mpx decoder can autonomous switch from stereo to mono to limit the output noise. t he dacs convert digital audio signal to analog an d change the volume at same time. the dacs has low - pass feature and - 3db frequency is about 30 khz . 3.2 synthesizer 1 t he frequency synthesizer 1 generates the local oscillator s ignal which divide to multi - phase , then be used to downconvert the rf input to a co nstant low intermediate frequency (if). the synthesizer reference clock is 32.768 khz . t he synthesizer frequency is defined by bits chan [9:0] with the range from 50 mhz to 108mhz. free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 4 of 22 3.3 delta - sigma synthesizer the delta - sigma synthesizer generates the constant c lock signal to adcs and dsp. 3.4 power supply the RDA5807HS integrated one ldo which suppl ies power to the chip. t he external supply voltage range is 1.8 - 5.5 v. 3.5 reset and control interface select the RDA5807HS is reset itself when vio is power up. a nd also s upport soft reset by trigger 02h bit1 from 0 to 1 . t he control interface is select by mode pin. t he mode pin is low , i2c interface is select. t he mode pin is set to vio , spi interface is select. 3.6 control interface the RDA5807HS supports i 2 the i c control interfac e. user could program the chip. 2 c interface is compliant to i 2 c bus specification 2.1. it includes two pins: sclk and sdio. a i 2 c interface transfer begins with start condition, a command byte and data bytes, each byte has a followed ack (or nack) bi t, and ends with stop condition. the command byte includes a 7- bit chip address (0010000b) and a r / w bit. the ack (or nack) is always sent out by receiver. when in write transfer, data bytes is written out from mcu, and when in read transfer, data bytes i s read out from RDA5807HS . there is no visible register address in i 2 c interface transfers. the i 2 details refer to RDA5807HS progra mming guide . c interface has a fixed start register address ( 0x 02h for write transfer and 0x 0ah for read transfer), and an internal incremental address counter. if register address meets the end of register file, 0x3a h, register address will wrap back to 0x 00h. for write transfer, mcu programs registers from register 0x 02h high byte, then register 0x 02h low byte, then register 0x 03h high byte, till the last register. rda5807 hs always gives out ack after every byte, and mcu gives out stop condition when register programming is finished. for read transfer, afte r command byte from mcu, RDA5807HS sends out register 0x 0ah high byte, then register 0x 0ah low byte, then register 0x 0b h high byte, till receives nack from mcu. mcu gives out ack for data bytes besides last data byte. mcu gives out nack for last data byte, and then RDA5807HS will return the bus to mcu, and mcu will give out stop condition. 3.7 i 2 the RDA5807HS support s i s audio data interface 2 s ( inter_ic sound bus) audio interface. the interface is fully compliant with i 2 s bus specification. when setting i2sen bit high, RDA5807HS will output sck, ws, sd signals from gpio3, gpio1, gp io2 as i 2 s master and tr ansmitter, the sample rate is 4 8 kbps 44.1kbps,32kbps ?. . RDA5807HS also support as i 2 details refer to RDA5807HS programming guide . s slaver mode and transmitter, the sample rate is less than 100kbps. 3.8 gpio outputs the RDA5807HS has t hree gpios. the function of gpios could programmed with bits gpio1[1:0], gpio2[1:0], gpio3[1:0] and i2sen. if i2sen is set to low, gpio pins could be programmed to output low or high or high - z, or be programmed to output interrupt and stereo indicator with bits gpio1[1:0], gpio2[1:0], gpio3[1:0]. gpio2 could be programmed to output a low interrupt (interrupt will be generated only with interrupt enable bit stcien is set to high) when seek/tune process completes. gpio3 could be programmed to output stereo in dicator bit st. constant low, high or high - z functionality is available regar dless of the state of v d d supplies or the enable bit. free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 5 of 22 figure 3 - 2 . i2s digital audio format 4 electrical characteristics table 4 - 1 dc electrical s pecification (recommended operation conditions): symbol description min typ max unit vdd supply voltage 1.8 3.3 5.5 v vio interface supply voltage 1.0 - 3.6 v t ambient temperature amb -2 0 2 7 +70 v cmos low level input voltage il 0 0.3*v io v v cmos high level input voltage ih 0.7*v io vio v v cmos threshold voltage th 0.5*v io v table 4 - 2 dc electrical specification (absolute maximum ratings): s ymbol description min typ max unit vio interface supply voltage - 0.5 + 3.6 v t ambient temperature amb -40 +90 c i input current in -10 (1) +10 ma v input voltage in - 0.3 (1) vio+0.3 v v lna fm input leve l lna +10 dbm notes: 1. for pin: sclk, sdio, sen , mode table 4 - 3 power c onsumption s pecification (vdd = 3.3 v, t a = 25 , unless otherwise specified) symbol description condition typ unit i supply current vdd enable=1 (1) 21 ma i supply current vdd enable=1 (2 ) 2 3 ma i interface supply current vio sclk and rclk active 6 0 a i powerdown current pd enable=0 5 a i interfa ce powerdown current vio enable=0 2 5 a notes: 1. for strong input signal condition 2. for weak input signal condition sck msb sd ws 1 sck left channel lsb msb 1 sck right channel lsb free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 6 of 22 5 receiver characteristics table 5 - 1 receiver characteristics (vdd = 3 v, t a = 25 c, unless otherwi se specified) symbol parameter conditions min typ max unit general specifications f fm i nput f requency range in adjust band register 50 108 mhz v sensitivity rf s /n=26db 1,2,3 50 mhz - 1 .5 - v emf 65 mhz - 1.5 - 88mhz - 1.2 1.5 98mhz - 1.2 1. 5 108mhz - 1.3 1.5 ip 3 input ip3 in agcd=1 4 80 - - db v a m suppression am m = 0.3 1,2 40 - - db s adjacent channel selectivity 200 200khz 50 70 - db s 400khz selectivity 400 400khz 60 85 - db v afl ; v audio l/r output voltage afr (pins lout and ro ut) 1,2 volume [3:0] =1111 - 420 - mv s/n maximum signal to noise ratio 1,2,3,5 mono 55 2 57 - db stereo 53 6 55 - stereo channel separation scs 35 - - db r audio output loading resistance l single - ended 32 - - thd audio total harmonic distortion volume [3:0] =1111 1,3, 6 r load - =1k 0. 15 0. 2 % r load - =32 0.2 - audio output l/r imbalance aoi 1,6 - - 0. 05 db r mute attenuation ratio mute volume[3:0]=0000 1 60 - - db bw audio response audio 1khz=0db 3 db point 1 low freq - 9 100 - hz high freq - 14 - pins lna n , lnap , lout, rout and nc(22,23) v pins lnan/ lnap input common mode voltage com_rfin 0 v v audio output common mode voltage com 8 1.0 1 . 05 1. 1 v v pins nc (22, 23) common mode voltage com_nc floating v ! the nc(22, 23) pins should be le ft floating. no tes: 1. f in = 65 to 108mhz; f mod 2. ? f=22.5khz ; 3. b =1khz; de - emphasis=75 s; mono=1; l=r unless noted otherwise ; af = 300hz to 15khz, rbw <=10hz; 4. |f 2 -f 1 |>1mhz, f 0 =2xf 1 -f 2 , agc disable, f in 5. p = 76 to 108mhz ; rf = 60db u v ; 6. ? f= 7 5kh z ,fpilot=10% 7. measured at v emf = 1 m v, f rf 8. at lout and rout pins 9. adjustable = 65 to 108mhz free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 7 of 22 6 serial interface 6.1 i 2 table 6 - 1 i c interface t iming 2 (vdd = 1.8 to 5.5 v, t c interface t iming c haract eristics a = - 25 to 85 c, unless otherwise specified) parameter symbol test condition min typ max unit sclk frequency f scl 0 - 400 khz sclk high time t high 0.6 - - s sclk low time t low 1.3 - - s setup time for start conditio n t su:sta 0.6 - - s hold time for start condition t hd:sta 0.6 - - s setup time for stop c ondition t su:sto 0.6 - - s sdio input to sclk setup t su:dat 100 - - ns sdio input to sclk hold t hd:dat 0 - 900 ns stop to start time t buf 1.3 - - s s dio output fall time t f:out 20+0.1c - b 250 ns sdio input, sclk rise/fall time t r:in / t f:in 20+0.1c - b 300 ns input spike suppression t sp - - 50 ns sclk, sdio capacitive loading c b - - 50 pf digital input pin capacitance 5 pf sclk sdio 1-7 8 9 1-7 8 9 1-7 8 9 start ack data high byte ack r/w address data low byte ack stop t su:sta t hd:sta t sp start t su:sto t buf t su:dat t hd:dat figure 6 - 1 . i 2 c interface write timing diagram sclk sdio 1-7 8 9 1-7 8 9 1-7 8 9 start ack data high byte ack r/w address data low byte nack stop t sp start t buf t su:sta t hd:sta t su:dat t hd:dat t su:sto figure 6 - 2 . i 2 c interface read timing diagram free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 8 of 22 7 register definition reg bits name function default 00h 15:8 chipid[7:0] chip id . 0x 58 02h 15 dhiz audio output high - z disable. 0 = high impedance; 1 = normal operation 0 14 dmute mute disable. 0 = mute; 1 = normal operation 0 13 mono mono select. 0 = stereo; 1 = force mono 0 12 bass bass boost. 0 = disabled; 1 = bass boost ena bled 0 11 rclk non - calibrate mode 0=rclk clock is always supply 1=rclk clock is not always supply when fm work ( when 1, RDA5807HS can t directly support - 20 ~70 temperature. only suppory 20 temperature swing from tune point) 0 10 rclk direct input mode 1=rclk clock use the directly input mode 0 9 seekup seek up. 0 = seek down; 1 = seek up 0 8 seek seek. 0 = disable stop seek ; 1 = enable seek begins i n the direction specified by seekup and ends when a channel is found, or the entire band has been searched. the seek bit is set low and the stc bit is set high when the seek operation completes. 0 7 skmode seek mode 0 = wrap at the upper or lower band l imit and continue seeking 1 = stop seeking at the upper or lower band limit 0 6:4 clk_mode[2:0] 000=32.768khz 001=12mhz 101=24mhz 010=13mhz 110=26mhz 011=19.2mhz 111=38.4mhz 000 1 soft_reset soft reset. if 0, not reset; if 1, reset. 0 0 enable power up enable. 0 = disabled; 1 = enabled 0 03h 15: 6 chan[ 9 :0] channel select. band = 0 0x00 free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 9 of 22 reg bits name function default frequency = channel spacing (khz) x chan + 87 .0 mhz band = 1 or 2 frequency = channel spacing (khz) x chan + 76.0 mhz band = 3 frequency = channel spacing (khz) x chan + 6 5 . 0 mhz chan is updated after a seek operation. 4 tune tune 0 = disable 1 = enable the tune operation begins when the tune bit is set high. the stc bit is set high when the tune operation completes. the tune bit is reset to low automatically when the tune operation completes.. 0 3: 2 band[1:0] band select. 00 = 87 ? 108 mhz (us/europe) 01 = 76 ? 91 mhz (japan) 10 = 76 ? 108 mhz ( world wide) 11 1 0 0 = 65 ? 76 mhz east europe or 50 - 65mhz 1: 0 space [1:0] channel spacing. 00 = 100 khz 01 = 200 khz 10 = 50khz 11 = 25khz 0 0 04h 15 rsvd 14 stcien seek/tune complete interrupt enable. 0 = disable interrupt 1 = enable interrupt setting stcien = 1 will generate a low pulse on gpio2 when the interrupt occurs. 0 13:12 rsvd 11 de de - emphasis. 0 = 75 s; 1 = 50 s 0 10 rsvd 9 softmute_en if 1, softmute enable 1 8 afcd afc disable. if 0, afc work; if 1, afc disabled. 0 7 rsvd 6 i2s_enabled i2s bus enable if 0, disabled; if 1, enabled. 0 1 if 0x07h_bit<9> ( band )=1, 65 - 76mhz; =0, 50 - 76mhz free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 10 of 22 reg bits name function default 5:4 gpio3[1:0] general purpose i/o 3. 00 = high impedance 01 = mono/stereo indicator (st) 10 = low 11 = high 00 3:2 gpio2[1:0] general purpose i/o 2. 00 = high impedance 01 = interrupt (int) 10 = low 11 = high 00 1:0 gpio1[1:0] general purpose i/o 1. 00 = high impedance 01 = reserved 10 = low 11 = high 00 05h 15 int _mode if 0, generate 5ms interrupt; if 1, interrupt last until read reg0 c h action occurs. 1 14:8 seekth[6:0] 2 seek snr threshold value when seek_mode[2:0]=001 0001000 7:6 lna_port_sel[1:0] lna input port selection bit: 00: no input 01: lnan 10 : lnap 11: dual port input 10 5:4 lna_icsel_bit[1:0] lna working current bit: 00=1.8ma 01=2. 5 ma 10= 3.1 ma 11=3. 8 ma 0 0 3:0 volume[3:0] dac gain control bits (volume). 0000=min; 1111=max volume scale is logarithmic when 0000, output mute and output imped ance is very large 1111 06h 14 open_mode open test register mode. 0=only open behind registers reading function 1=open behind registers writing function 0 12 i2s_mode_select if 0, master mode; if 1, slave mode. 0 7:4 i2s_ws_cnt[4:0] o nly valid in mas ter mode 4'b1000: ws_step_48; 4'b0111: ws_step = 44.1 kbps ; 4'b0110: ws_step = 32 kbps ; 4'b0101: ws_step = 24 kbps ; 4'b0100: ws_step = 22.05 kbps ; 4'b0011: ws_step = 16 kbps ; 4'b0010: ws_step = 12 kbps ; 4'b0001: ws_step = 11.025 kbps ; 4'b0000: ws_step = 8 kbps ; 0000 2 this value is used when 0x20h_bit<14:12> ( seek_mode )=001, default seek mode is audio_snr seek mode. free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 11 of 22 reg bits name function default 0ah 14 stc seek/tune complete. 0 = not complete 1 = complete the seek/tune complete flag is set when the seek or tune operation completes. 0 13 sf seek fail. 0 = seek successful; 1 = seek failure the seek fail flag is set when the seek operation fails to find a ch annel with an rssi level greater than seekth[5:0] . 0 10 st stereo indicator. 0 = mono; 1 = stereo stereo indication is available on gpio3 by setting gpio1[1:0] =01. 1 9:0 readchan[9:0] read channel. band = 0 frequency = channel spacing (khz) x re adchan [ 9 :0]+ 87 .0 mhz band = 1 or 2 frequency = ch annel spacing (khz) x readchan[ 9 :0]+ 76.0 mhz band = 3 frequency = channel spacing (khz) x readchan[ 9 :0]+ 6 5 .0 mhz readchan[ 9 :0] is updated after a tune or seek operation. 8?h00 0bh 15:9 rssi[6:0] rssi. 000000 = min 111111 = max rssi scale is logarithmic. 0 8 fm t rue 1 = the current channel is a station 0 = the current channel is not a station 0 7 fm_ready 1=ready 0=not ready 0 free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 12 of 22 8 pin s description figure 8 - 1 . RDA5807HS top view table 8 - 1 RDA5807HS pins description symbol pin description gnd 4 ,5, 11 , 14, 20 ground. connect to ground plane on pcb lnan,lnap 1 , 3 lna input port. for single - ended input, ln an should be connected to rf gnd rfgnd 2 lna ground. connect to rf ground plane on pcb sclk 6 clock input for serial control bus sdio 7 d ata inp ut/output for serial control bus rclk 8 32.768khz crystal oscillator and reference clock input vio 9 power supply for i/o vdd 10 power supply rout,lout 1 2 ,1 3 right/left audio output gpio1,gpio2,gpio3 1 7 , 16, 1 5 general purpose input/output nc 18, 19 no connect 2 3 4 5 1 6 15 14 13 12 11 7 8 9 10 20 19 18 17 16 gnd pad gnd rfgnd lnap gnd rda 5807 hs v d d gnd lout lnan rout gnd s c l k s d i o r c l k v i o g n d n c n c g p i o 1 g p i o 2 gpio 3 free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 13 of 22 table 8 - 2 internal pin configuration symbol pin description lnan / lnap 1 / 3 lnap fms mn1 rload 50pf rclk 8 rclk 5m 20pf 6pf inv 5m 0x02h_bit<10> vio =1 =0 sclk/sdio 6/7 47k s in s out mn1 sdio\sclk gpio1/gpio2/gpio3 1 7/16/15 gpio1\2\3 in out 200k vio free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 14 of 22 9 application d iagram 9.1 audio loading resistance larger t han 32 & tcxo application : j figure 9 - 1 . RDA5807HS fm tuner application diagram ( tcxo application ) 9.1.1 bill of materials: component value description supplier u1 RDA5807HS broadcast fm radio tuner rda j1 common 32 resistance headphone l3/ c 3 100nh/ 24pf lc chock for lna input murata c4,c5 125 f audio ac c ouple capacitors murata c6 2 2 nf power supply bypass capacitor murata f1/f2 1.5k@100mhz fm band ferrite murata notes: 1. j1: common 32 ? resistance headphone ; 2. u1: RDA5807HS chip ; 3 . v1: analog and digital power supply ( 1.8 ~5.5v) ; 4 . fm choke (l3 and c3) for audio common and lna input common ; 5 . pins nc( 18, 19), should be leaved floa ting ; 6 . place c6 close to RDA5807HS pin . free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 15 of 22 9.2 audio loading resistance l ower t han 32 & d cxo application : j1 c4 125uf c5 125uf f1 1.5k@100mhz f2 1.5k@100 mhz u2 32.768k dcxo u1 gnd rfgnd lnap gnd RDA5807HS vdd gnd lout lnan rout gnd gpio3 sclk sdio rclk vio gnd nc nc gpio1 gpio2 1 6 11 16 sclk sdio vio gpio1 gpio2 v1 l3 100nh c3 24pf c6 24nf gpio3 figure 9 - 2 . RDA5807HS fm tuner application diagram ( 32.768k crystal,i2c bus mode) 9.2.1 bill of materials: component value description supplier u1 RDA5807HS broadcast fm radio tuner rda j 1 audio amplifier c4/ c5 125uf audio ac couple capacitors murata l3/c3 100nh/24pf lc chock for lna input murata c6 24nf power supply bypass capacitor murata f 1/f2 1.5k@100mhz fm band ferrite murata notes: 1. j 1: common 32 ? resistance headphone ; 2. u1: RDA5807HS chip ; 3 . v1: anal og and digital power supply ( 1.8 ~5.5v) ; 4 . fm choke (l3 and c3) for audio common and lna input common ; 5 . pins nc( 18, 19), should be leaved floating ; 6 . place c6 close to RDA5807HS pin . free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 16 of 22 10 package physical dimension figure 10- 1 illustrates the package details for the RDA5807HS . the package is lead - free and rohs - compliant. l 20 1 4 19 d e a b c e 4 e 2 e b see detail a see detail a d2 a3 a1 a 2 1 n detail a terminal tip e l l e e /2 even terminal/side odd terminal/side detail a side view top view bottom view e2 min nom max d 3.00 bsc e 3.00 bsc d2 e2 e 0.40 bsc l 0.30 0.40 0.50 b 0.15 0.20 0.25 a 0.80 0.85 0.90 a1 0.00 0.02 0.05 a3 0.203 ref 1.60 1.65 1.70 1.60 1.65 1.70 figure 10- 2 . 2 0 - pin 3 x 3 quad flat no - lead (qfn) free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 17 of 22 11 pcb land pattern fig ure 1 8 . classification reflow profile profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (t smax to t p 3 ) o 3 c/second max. o c/second max. preheat - temperature min (t smin - temperature max (t ) smax - time (t ) smin to t smax ) 100 o 100 c o 60- 120 seconds c 150 o 200 c o 60- 180 seconds c time maintained above: - temperature (t l - time (t ) l ) 183 o 60- 150seconds c 217 o 60- 150 seconds c peak /classification temperature(t p see table - ii ) see table - iii time within 5 o c of ac tual peak temperature (t p 10- 30 seconds ) 20- 40 seconds ramp - down rate 6 o 6 c/second max. o c/seconds max. time 25 o 6 minutes max. c to peak temperature 8 minutes max. table - i classification reflow profiles free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 18 of 22 package thickness volume mm <350 3 volume mm 350 3 2.5mm 240 + 0/ - 5 o 225 + 0/ - 5 c o c 2.5mm 225 + 0/ - 5 o 225 + 0/ - 5 c o c table ? ii snpb eutectic process ? package peak reflow temperatures package thickness volume mm 350 3 volume mm 350- 2000 3 volume mm 2000 3 1.6mm 260 + 0 o 260 + 0 c * o 260 + 0 c * o c * 1.6mm ? 2.5mm 260 + 0 o 250 + 0 c * o 245 + 0 c * o c * 2.5mm 250 + 0 o 245 + 0 c * o 245 + 0 c * o c * * tolerance : the device manufacturer /supplier shall assure process compatibility up to and including the stated classification tem perature(this mean peak reflow temperature + 0 o c. for example 260+ 0 o c ) at the rated msl level. table ? iii pb - free process ? package classification reflow temperatures note 1: all temperature refer topside of the package. m easured on the pa ckage body surface. note 2: the profiling tolerance is + 0 o c , - x o is required to control the profile process but at no time will it exceed - 5 c (based on machine variation capability)whatever o note 3: package volume excludes external terminals(balls, bumps, lands, leads) and/or non integral heat sinks. c . the producer assures process compatibility at the peak reflow profile temperatures defined in table ? iii. note 4: the maximum component temperature reached during reflow depends on package t he thickness and volume. the use of convection reflow processes reduces the thermal gradients between packages. however, thermal gradients due to differences in thermal mass of smd pack age may sill exist. note 5: components intended for use in a ? lead - free ? assembly process shall be evaluated using the ? lead free ? classification temperatures and profiles defined in table - i ii iii whether or not lead free. free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 19 of 22 rohs compliant the product does not contain lead, mercury, cadmium, hexavalent chromium, polybrom inated biphenyls (pbb) or polybrominated diphenyl ethers (pbde) , and are therefore considered rohs compliant. esd sensitivity integrated circuits are esd sensitive and can be damaged by static electricity. proper esd techniques should be used when handlin g these devices. free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 20 of 22 12 change list rev date auther change description v 1. 1 2010- 08- 0 8 chun zhao , yanan liu original d raft . free datasheet http://
rda microelectronics, inc. RDA5807HS fm tuner v1 . 2 the information contained herein is the exclusive property of rda and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of rda . page 21 of 22 13 contact information rda m icroelectronics ( shanghai), inc. suite 1108 block a, e - wing center, 113 zhichun road haidian district, beijing tel: 86- 10- 62635360 fax: 86- 10- 82612663 postal code: 100086 suite 302 building 2, 690 bibo road pudong district, shanghai tel: 86- 21- 50271108 fax: 86- 21- 50271099 postal code: 201203 copyright ? rda m icroelectronics inc. 20 11 . all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. free datasheet http://

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